1. Field of the Invention
Embodiments of the present invention are directed to high density semiconductor devices, such as nonvolatile memory, and systems and methods for isolating active regions and components in high density semiconductor devices.
2. Description of the Related Art
Integrated circuits are constructed by electrically connecting multiple isolated devices that share a common substrate. When multiple devices are formed on or in a common substrate, it is necessary to isolate the individual devices using isolation technology. As the density of integrated circuits continues to increase, the space available for isolating devices tends to decrease. With decreased device dimensions, inter-device parasitic currents and charges can become more problematic, making isolation technology a critical component of integrated circuit fabrication.
For example, in nonvolatile semiconductor memory devices such as flash memory, many individual storage elements are constructed from a common substrate to form a memory array. These individual storage elements must be isolated from one another using isolation technology. In one example of a flash memory system, the NAND structure is used. The NAND structure includes multiple transistors arranged in series, sandwiched between two select gates. The transistors in series and the select gates are referred to as a NAND string. Isolation technologies are typically employed during the device fabrication process to provide electrical isolation between adjacent NAND strings sharing a common substrate.
Numerous techniques exist for isolating devices in NAND flash memory and other types of semiconductor devices. In Local Oxidation of Silicon (LOCOS) techniques, an oxide is grown or deposited on the surface of a substrate, followed by the deposition of a nitride layer over the oxide layer. After patterning these layers to expose the desired isolation areas and cover the desired active areas, a trench is etched into these layers and a portion of the substrate. An oxide is then grown on the exposed regions. The grown oxide typically grows under the deposited nitride causing the encroachment of oxide into the active regions (often referred to as a bird's beak). This encroachment can cause stresses and ultimately defects in the silicon. Furthermore, the encroachment decreases the available active area for constructing devices which limits the density that can be achieved in the integrated circuit. Additionally, the LOCOS technique can cause alignment issues since the trench is formed prior to forming layers such as the conductive layer used to fabricate the floating gate of a device. For example, the subsequently formed floating gate material may not properly align between two predefined trenches.
Improvements to these processes have been made by employing such techniques as sidewall-masked isolation (SWAMI) to decrease encroachment into active areas. In SWAMI, a nitride is formed on the trench walls prior to forming the oxide to decrease the oxide's encroachment and formation of bird's beaks. While this process provides an improvement to conventional LOCOS, the nitride in the trench rises during oxidation, causing encroachment into the active areas. This technique also yields excessive stress in the corners of the trench since oxide growth in that region is restrained. Moreover, the trenches are formed prior to device fabrication leading to the aforementioned alignment issues.
Accordingly, there is a need for isolation technology that can effectively isolate devices in high density semiconductor integrated circuits while addressing the shortcomings of the prior art identified above.